A scalable reed-solomon encoder and syndrome generator

dc.contributor.authorOkumu, Elizabeth Mukhwana
dc.date.accessioned2019-09-29T13:47:06Z
dc.date.accessioned2020-01-07T14:42:04Z
dc.date.available2019-09-29T13:47:06Z
dc.date.available2020-01-07T14:42:04Z
dc.date.issued2001
dc.descriptionAvailable in print formen_US
dc.description.abstractIn digital transmission, data is either being sent or being received. Therefore the encoder and decoder is usually combined into one unit to form the codec (encoder 1 decoder). For Reed-Solomon codes, syndromes of the received code words are calculated during the decoding process and are then used in correcting the errors in the received code words. It has been shown that the encoder and syndrome generator can be combined into one circuit, thereby resulting in substantial hardware savings. In this dissertation, a combined Reed-Solomon encoder and syndrome generator is designed and implemented. The design is scalable and is of variable design correction power. The first step is to describe the design in hardware description language, VHDL. From this description, one can then easily implement the design on FPGA circuitry using automated circuit synthesis tools. All this is presented in the dissertation, together with the testing and results obtaineden_US
dc.identifier.citationOkumu, E. M. (2001) A scalable reed-solomon encoder and syndrome generator, Master dissertation, University of Dar es Salaam. Available at (http://41.86.178.3/internetserver3.1.2/detail.aspx)en_US
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/580
dc.language.isoenen_US
dc.publisherUniversity of Dar es Salaamen_US
dc.subjectGenerators computer programsen_US
dc.subjectEncoder and Syndrome generatorsen_US
dc.subjectElectric generatorsen_US
dc.titleA scalable reed-solomon encoder and syndrome generatoren_US
dc.typeThesisen_US
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